1. Field of the Invention
The present invention relates to a low-noise amplifier. Particularly, the present invention relates to a low-noise amplifier incorporated into a receiver section of a communication device.
2. Description of the Related Art
In recent years, with advancement of radio communication technologies, communication devices have been developed to enhance their function. For example, it is demanded that a plurality of communication systems be incorporated into a single communication device. In such a communication device, the plurality of communication systems include transmission circuits independent of each other, respectively, and receiving circuits independent of each other, respectively, and are operative simultaneously. For this reason, in some occasions, a high-level disturbing (interfering) wave signal from a transmission circuit in a particular communication system leaks into receiving circuits in other communication systems. For example, in a configuration of MIMO (multiple-input and multiple-output) in which a plurality of signals are transmitted and received simultaneously to enhance a communication speed, even in a communication device incorporating a single communication system, a disturbing wave signal with a higher level than a desired wave is input to a receiving circuit. From now on, it is expected that the communication device is small-sized and the number of communication systems incorporated into the communication device increases. Therefore, there will be a tendency that an influence of the disturbing wave signal increases. Under the circumstance, it is demanded that high-communication quality be maintained.
FIG. 6 is a circuit diagram showing a configuration of a low-noise amplifier used in a receiving circuit in a communication system. Referring to FIG. 6, the low-noise amplifier includes a NPN-type transistor 1, an input terminal 2 connected to a base of the NPN-type transistor 1 via a DC cut capacitor 5, an output terminal 3 connected to a collector of the NPN-type transistor 1 via a DC cut capacitor 6, an inductor 7 connected to an emitter of the NPN-type transistor 1 and to a ground, an inductor 8 connected to a collector of the NPN-type transistor 1 and to a power supply terminal 4, and a bias circuit 9 for supplying a bias current to the base of the NPN-type transistor 1. The NPN-type transistor 1 constitutes an amplifier element which amplifies a signal input thereto through the input terminal 2 via the DC cut capacitor 5 and outputs the amplified signal to the output terminal 3 via the DC cut capacitor 6.
The low-noise amplifier shown in FIG. 6 is designed on the basis of a performance in a case where a weak electric field is input, because the signal input to the input terminal 2 typically has a low level. Under an environment in which the high-level disturbing wave signal may be input, an operation point of the low-noise amplifier falls outside a linear region. This results in a problem that a receiving sensitivity of the communication device is degraded due to a suppressed power gain. Accordingly, an approach for increasing the bias current in the low-noise amplifier could be made, to provide a high output of the low-noise amplifier and achieve reduction of the degree to which the power gain is suppressed when the high-level disturbing wave signal is input. However, in this approach, the bias current increases even when the weak electric field is input, thereby resulting in a problem that electric power consumption of the communication device increases.
Under the circumstances, for example, Japanese Laid-Open Patent Application Publication No. 2003-218653 discloses a low-noise amplifier in which an output signal voltage of a signal amplifying dual gate FET is detected by a capacitor and a resistor, and is applied to a gate terminal of an enhancement FET, and the enhancement FET increases a bias current fed to the signal amplifying dual gate FET when a level of an input signal increases up to a level at which a gain of the signal amplifying dual gate FET is suppressed.